Expected Pay Rate:$88.00 - $107.00 per hour
Schedule:Monday - Friday, 40 hours per week
Assignment Length:12 month contract
HireArt is helping the world’s largest social network hire a Silicon Digital Design Engineer to perform IP integrations, drive top-level µArchitecture definitions, and develop the necessary RTLs.As a Silicon Digital Design Engineer, you will:
- Drive chip-level integrations, verification plan development, and verification.
- Supervise the RTL-to-GDS flow and assist with synthesis and timing closure.
- Support hand-offa and integration of blocks into larger SOC environments.
- Bachelor’s in Electrical Engineering/Computer Science or equivalent experience
- 4+ years experience as a Digital Design Engineer and/or a Chip Lead
- Experience in RTL coding, synthesis and/or SoC Integration
- Experience in digital design µArchitecture
- Experience with UPF based simulation flow
- System Verilog OVM/UVM experience
- TCL and Python (or similar) scripting experience
- Experience in SoC integration and ASIC architecture
- Master's degree in Electrical Engineering/Computer Science
- Experience in DFT/Testability requirement and test program definition
- Experience using High Speed interfaces like PCIe, USB, MIPI
- FPGA design
- Tensilica DSP, TIE, CNN, fixed point, floating point, Python
- Experience with Power Aware GLS flow
Commitment:This is a full-time, 12-month contract position staffed via HireArt and based in Sunnyvale, CA. It will be fully remote until offices reopen and is available to candidates local to the Bay Area.
HireArt values diversity and is an Equal Opportunity Employer. We are interested in every qualified candidate who is eligible to work in the United States. Unfortunately, we are not able to sponsor visas or employ corp-to-corp.