Expected Pay Rate:$87.00 - $106.00 per hour
Schedule:Monday - Friday, 40 hours per week
Assignment Length:6 month contract
HireArt is helping the world’s largest social network hire a Design Engineer (Hardware Prototyping) to work on functional and performance prototype testing of RTL designs implemented on FPGA.
In this role, you’ll modify the RTL and running synthesis for both FPGA and gate level targets. You’ll also work with architects, designers, verification, and software teams.As a Design Engineer, you will:
- Create and/or modify FPGA builds consisting of various SoC components, such as CPUs, fabric, MMU, memory controller, DMA, interrupt controller, and custom HW accelerators.
- Characterize the performance of the system under different configuration options.
- Perform synthesis of various components to understand area and performance tradeoffs.
- Bachelors degree in engineering
- 3+ years experience using FPGAs for hardware prototyping
- Background using RTL and synthesis flows
- Verbal/written communication skills and analytical/problem solving ability
- Team player and detail oriented
Commitment:This is a full-time (40 hours per week), 6-month contract position staffed via HireArt and based in Redmond, WA. It will be fully remote until offices reopen and is available to candidates local to the Redmond area.
HireArt values diversity and is an Equal Opportunity Employer. We are interested in every qualified candidate who is eligible to work in the United States. Unfortunately, we are not able to sponsor visas or employ corp-to-corp.